BINARY ADDITION 

Binary addition

   works in the same way, except that only 0's and 1's can be used, instead of the whole spectrum of 0-9. This actually makes binary addition much simpler than decimal addition, as we only need to remember the following:

0 + 0 = 0

0 + 1 = 1

1 + 0 = 1

1 + 1 = 10

As an example of binary addition we have,

  101

+101

a) To add these two numbers, we first consider the "ones" column and calculate 1 + 1, which (in binary) results in 10. We "carry" the 1 to the "tens" column, and the leave the 0 in the "ones" column.

b) Moving on to the "tens" column, we calculate 1 + (0 + 0), which gives 1. Nothing "carries" to the "hundreds" column, and we leave the 1 in the "tens" column.

c) Moving on to the "hundreds" column, we calculate 1 + 1, which gives 10. We "carry" the 1 to the "thousands" column, leaving the 0 in the "hundreds" column.

  101

+101

1010

Another example of binary addition:

  1011

+1011

10110

Note that in the "tens" column, we have 1 + (1 + 1), where the first 1 is "carried" from the "ones" column. Recall that in binary,

1 + 1 + 1 = 10 + 1

                = 11

BINARY ADDERS

An arithmetic circuit which is a combination circuit that performs arithmetic operations such as addition and subtraction with binary numbers or with decimal numbers in a binary code. 

HALF ADDER

It is an arithmetic circuit that generates the sum of two binary digits. The circuit has two inputs and to outputs. The input variables are augend and addend bits to be added, and the output variables produce the sum and carry.  

The C output is 1 only when both outputs are 1. The S output are least significant bit of the sum. The Boolean functions for the two outputs, easily obtained from the truth table are

S = X’Y + XY’= X+Y

C = XY

The half adder can be implemented with one exclusive OR gate and one AND gate.

A half-adder adds two 1-bit inputs and produces a sum bit and a carry bit as outputs. 

FULL ADDER

A full adder is a combinational circuit that forms the arithmetic sum of three input bits. Besides the tree inputs, it has two outputs. Two of the iput variables denoted by A and B, present the two significant bits to be added. The third input, C(Carry In), represents the carry from the previous lower significant position. Two outputs are necessary because the arithmetic sum of three bits ranges from 0 to 3, and binary 2 and 3 need two digits for their representation. Again, the two outputs are designated by the symbol S for “sum” and C for “carry”; the binary variable S gives the value of the bit of the sum, and the binary variable C gives the output carry. 

A full-adder is merely a half-adder that accepts an extra input; namely, the carry bit from another full-adder. Each full-adder is responsible for adding one pair of corresponding digits from the two numbers to be added, and it must add to that the carry bit from the previous full-adder. The full-adder will output the resulting sum bit and carry bit, and the process will continue until all the digits have been added. 

The values for the outputs are determined from the arithmetic sum of the three inputs. When all the input bits are 0, the outputs are 0. The S output is equal to 1 when only one input is equal to 1 or hence all three inputs are equal to 1. 

A full adder can be implemented in many different ways such as with a custom transistor-level circuit or composed of other gates. One example implementation is with 

In this implementation, the final OR gate before the carry-out output may be replaced by an XOR gate without altering the resulting logic. Using only two types of gates is convenient if the circuit is being implemented using simple IC chips which contain only one gate type per chip. In this light, C_out can be implemented as

 .

A full adder can be constructed from two half adders by connecting A and B to the input of one half adder, connecting the sum from that to an input to the second adder, connecting C_i to the other input and OR the two carry outputs. Equivalently, S could be made the three-bit XOR of A, B, and C_i, and C_out could be made the three-bit majority function of A, B, and C_i.

Schematic symbol for a 1-bit full adder with C_in and C_out  

By: Dinah Rose Y Galiza